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JOB TITLEDFT Engineer
Department:Semiconductors
Office:Egham, Surrey, TW208HE
JOB PURPOSE

ZiiLABS is a leader in media-rich application processors, hardware platforms and advanced middleware. Its products enable OEMs, ODMs, System Integrators and Software Developers to deliver industry-leading devices across a broad range of consumer electronics and embedded markets. Originally founded in 1994 as 3DLABS, the company re-branded and joined with the Personal Digital Entertainment group of Creative Technology to form ZiiLABS in January 2009. ZiiLABs has offices in the UK, China, USA and Singapore.  

The successful candidate will be working in a small team. The position would suit an engineer looking for a career involving all aspects of SOC Design For Test (DFT) and production test bring-up.


REPORTING TO


STAGE IN CREATIVE CAREER MAP

RESPONSIBILITIES
  • Test logic design and verification
  • BIST integration and verification
  • ATPG pattern generation
  • ATPG test coverage analysis and improvement
  • Production testing of analogue and IP blocks
  • STA constraint development for test
  • Back-annotated test vector simulation and debug
  • Test program bring-up and post-silicon test debug

SKILLS/KNOWLEDGE/EXPERIENCE
  • Experience in DFT/ATPG
  • RTL and gate-level debug/verification
  • Experience in using RTL/gate-level simulators
  • Proficient in Unix/Linux
  • Scripting skills, preferably Perl
  • An Electronic Engineering Degree or equivalent
  • Some ATE or lab-based silicon debugging skills are desirable

EDUCATION

The role is based at our UK Design Centre in Surrey. Remuneration package will be commensurate with experience, and includes excellent basic salary, pension scheme, private health scheme, and life assurance.

For further information go to www.ziilabs.com



Note: As with all positions, due to the dynamic nature of Creative’s business, key responsibilities will evolve and change over time.